NullStack Challenge 01

Matrix multiplier machine

Design a machine that multiplies two 1024 × 1024 FP16 matrices through an external-memory interface.

The machine has access to external memory containing two matrices of 16-bit elements. It can read four elements (64 bits) and write four elements (64 bits) every clock cycle.

Matrix A is located at address 0 and above.

Matrix B is located at address 256K and above.

Write the result to address 512K and above.

Interface Signals

Input: Clock (1b)
Input: Reset (1b)
Output: mem_read_en (1b)
Output: mem_read_addr (20b)
Input: mem_read_data (64b), arriving 3 clocks after mem_read_en is set
Output: mem_write_en (1b)
Output: mem_write_addr (20b)
Output: mem_write_data (64b)
Input: multiply_en (1b)
Output: ready (1b)

Execution Sequence (multiply_en asserted)

Deassert ready.
Multiply the two matrices and write the result to address 512K and above.
Assert ready.

Design Requirements

Build a machine that executes the task as fast as possible; area is not a concern.
Build a separate machine that executes the task using only four multipliers.